User:Edo248/Books/Microelectronics
 | The Wikimedia Foundation's book rendering service has been withdrawn. Please upload your Wikipedia book to one of the external rendering services. |
 | You can still create and edit a book design using the Book Creator and upload it to an external rendering service:
|
| This user book is a user-generated collection of Wikipedia articles that can be easily saved, rendered electronically, and ordered as a printed book. If you are the creator of this book and need help, see Help:Books (general tips) and WikiProject Wikipedia-Books (questions and assistance). Edit this book: Book Creator · Wikitext Order a printed copy from: PediaPress [ About ] [ Advanced ] [ FAQ ] [ Feedback ] [ Help ] [ WikiProject ] [ Recent Changes ] | ||||||||
Microelectronics[edit]
Digital Design, Fabrication, and more[edit]
- Electronic design automation
- Algorithm engineering
- Algorithmic State Machine
- And-inverter graph
- Antenna effect
- Asynchronous system
- Black's equation
- Boolean satisfiability problem
- Cell (EDA)
- Channel router
- Circuit extraction
- Design closure
- Design flow (EDA)
- Design for manufacturability (IC)
- Design for testing
- Digital electronics
- Dolphin Integration
- EDA database
- Electromagnetic field solver
- Electromigration
- Electronic circuit simulation
- Electronic system-level design and verification
- Elmore delay
- Engineering Change Order
- Fault coverage
- Feedback controlled electromigration
- Fiduccia-Mattheyses algorithm
- Floorplan (microelectronics)
- Gajski-Kuhn chart
- Generic array logic
- Graphical system design
- Hardware obfuscation
- High-level synthesis
- High-level verification
- IC layout editor
- IEC 61131-3
- Input/output Buffer Information Specification
- Ladder logic
- Lee algorithm
- Logic optimization
- Logic simulation
- Logic synthesis
- Mask data preparation
- Maze runner
- Multi-channel length
- Multi-project wafer service
- Netlist
- Network On Chip
- Noise margin
- Open Verification Methodology
- PBIST
- Physical design (electronics)
- Place and route
- Placement (EDA)
- Platform-based design
- Potential applications of carbon nanotubes
- Power gating
- Power network design (IC)
- Power optimization (EDA)
- Programmable Array Logic
- Programmable logic array
- Programmable system device
- Register-transfer level
- Rent's rule
- Resolution enhancement technologies
- Routing (electronic design automation)
- Satisfiability Modulo Theories
- SCALD
- Schematic
- Schematic capture
- Schematic editor
- Semiconductor device modeling
- Semiconductor intellectual property core
- Semiconductor process simulation
- Signal integrity
- Signoff (electronic design automation)
- Silicon compiler
- Simulation software
- Standard cell
- State logic
- Stuck-at fault
- Substrate coupling
- Symbolic simulation
- Systems design
- Technology CAD
- Test compression
- Touchstone file
- Transaction-level modeling
- Ultra-large-scale systems
- Universal Verification Methodology
- Integrated circuit
- Invention of the integrated circuit
- List of integrated circuit manufacturers
- 4000 series
- List of 7400 series integrated circuits
- 7400 series
- 74181
- 8250 UART
- AMD Lance Am7990
- Angle-sensitive pixel
- ANTIC
- Application-specific instruction-set processor
- Application-specific integrated circuit
- Application-specific standard product
- Atari AMY
- AY-3-8500
- Beetle (ASIC)
- Built-in self-test
- Cactus graph
- Charge controller
- Charge-coupled device
- Chip art
- Chip famine
- Chip support package
- Chipset
- CMD640
- CMOS
- Compliant bonding
- Computer module
- Copper interconnect
- CTIA and GTIA
- Current conveyor
- Delay-locked loop
- Die (integrated circuit)
- Die shrink
- Digital clock manager
- Digital signal controller
- Digital signal processor
- Disk controller
- Engineering sample
- EPROM
- Floppy disk controller
- Fluorosilicate glass
- Full custom
- Fully differential amplifier
- General Purpose Input/Output
- Gold-aluminium intermetallic
- HCMOS
- Heat generation in integrated circuits
- High Precision Event Timer
- Hot-carrier injection
- IC power supply pin
- Iddq testing
- Integrated circuit design
- Integrated circuit development
- Integrated circuit layout design protection
- Integrated fluidic circuit
- Intel 8237
- Intel 8251
- Intel 8253
- Intel 8255
- Intel 8259
- Intel 8279
- Intel MCS-48
- Interconnect bottleneck
- Interface Logic Model
- Interposer
- Inverter (logic gate)
- Irreversible circuit
- Latchup
- List of 4000 series integrated circuits
- Logic built-in self-test
- Magic (software)
- MAX232
- Mead & Conway revolution
- Melexis
- Memory Management Controller
- Microtune MT2060
- Moisture Sensitivity Level
- Monolithic microwave integrated circuit
- MOS Technology CIA
- MOS Technology SID
- MOS Technology VIC
- MOS Technology VIC-II
- MOSIS
- Motorola 68881
- NCR 5380
- NCR 53C9x
- NE2000
- Network Search Engine
- Neurochip
- Operational amplifier
- Optical interconnect
- PCMOS
- Bob Pease
- Peripheral DMA controller
- PHY (chip)
- Pin-compatibility
- PLL multibit
- POKEY
- Power Management IC
- PowerHUB
- Process control monitoring
- Process corners
- Programmer (hardware)
- PSoC
- P–n junction isolation
- Quality Intellectual Property Metric
- Quality of results
- Radiation hardening
- Real-time clock
- Repeater insertion
- Resistor–transistor logic
- RFIC
- Semiconductor Chip Protection Act of 1984
- Semiconductor memory
- Silicon-germanium
- Special Input/Output
- System in package
- System-level solution
- Thermal simulations for Integrated Circuits
- Three-dimensional integrated circuit
- Through-silicon via
- Timing delay in vlsi circuit
- TMS6100
- Transistor count
- Transmission-line pulse
- 16550 UART
- VerilogCSP
- Very-large-scale integration
- VHSIC
- VLSI Project
- Western Digital FD1771
- Jim Williams (analog designer)
- Xceive XC3028
- Zilog SCC
- Semiconductor device fabrication
- Advanced Silicon Etch
- Airgap (microelectronics)
- B-staging
- Back end of line
- Ball bonding
- Beam lead technology
- Bond characterization
- Borophosphosilicate glass
- Bow and warp of semiconductor wafers and substrates
- Capacitance voltage profiling
- Chalcogenide chemical vapour deposition
- Channel-stopper
- Chemical vapor deposition
- Chemical-mechanical planarization
- Alfred Y. Cho
- Cleanroom
- Common Platform
- Dark current spectroscopy
- Deal–Grove model
- Deep reactive-ion etching
- Device under test
- Dicing tape
- Die preparation
- Diffusion barrier
- Doping (semiconductor)
- Drive Level Capacitance Profiling
- Dry etching
- Electron beam-induced current
- Electrostatic spray assisted vapour deposition
- Epitaxy
- Epiwafer
- Etching (microfabrication)
- EV Group
- Evaporation (deposition)
- Fabless manufacturing
- Front end of line
- Finetech
- Focused ion beam
- FOUP
- Furnace anneal
- Gas immersion laser doping
- Gate count
- Hardmask
- Health hazards in semiconductor manufacturing occupations
- Homotopotaxy
- High-Speed SECS Message Services
- Hydride vapour phase epitaxy
- Integrated circuit packaging
- Integrated device manufacturer
- Ion beam
- Ion beam lithography
- Ion beam mixing
- Ion implantation
- Ion Layer Gas Reaction
- Kinetic Monte Carlo surface growth method
- Klaiber's law
- Laser trimming
- Layer (electronics)
- Lift-off (microtechnology)
- List of semiconductor fabrication plants
- Metal-induced crystallization
- Metalorganic vapour phase epitaxy
- Microfabrication
- Micropipe
- Monolayer doping
- Negative bias temperature instability
- Non-contact wafer testing
- Ohmic contact
- Oramir
- Overlay Control
- Package on package
- Phenol formaldehyde resin
- Phosphosilicate glass
- Physical vapor deposition
- Planar process
- Plasma ashing
- Plasma cleaning
- Plasma etcher
- Plasma etching
- Plasma-enhanced chemical vapor deposition
- Plasma-immersion ion implantation
- Polycide
- Probe card
- Process design kit
- Process variation (semiconductor)
- Product binning
- Product engineering
- PROLITH
- Pulsed laser deposition
- Rapid thermal processing
- RCA clean
- Reactive-ion etching
- Redistribution layer
- Reliability (semiconductor)
- Resist
- Restrictive design rules
- Rigid needle adapter
- Salicide
- SECS/GEM
- Selective area epitaxy
- Semiconductor Equipment and Materials International
- Semiconductor fabrication plant
- Semiconductor industry
- Shallow trench isolation
- Silicon intellectual property
- Silicon on sapphire
- Smart Cut
- Smif interface
- Spin coating
- Spreading Resistance Profiling
- Sputter deposition
- Strained silicon directly on insulator
- Stress migration
- Substrate mapping
- Tetrakis(dimethylamido)titanium
- Thermosonic bonding
- Titanium nitride
- Triethylgallium
- Trimethylgallium
- Ultra-high-purity steam for oxidation and annealing
- Vapour phase decomposition
- Wafer (electronics)
- Wafer backgrinding
- Wafer dicing
- Wafer fabrication
- Wafer testing
- Wafer-scale integration
- Wafering
- Wire bonding
- Integrated circuit layout
- Foundry model
- Altis Semiconductor
- GlobalFoundries
- Hejian Technology Corporation
- Hindustan Semiconductor Manufacturing Company
- Jazz Semiconductor
- Powerchip Semiconductor
- Semiconductor Manufacturing International Corporation
- Systems on Silicon Manufacturing Co. Pte. Ltd.
- Tower Semiconductor
- TSMC
- United Microelectronics Corporation
- Vanguard International Semiconductor Corporation
- X-Fab