Talk:FLAGS register

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Wrong control flags: only DF is a control flag[edit]

In the June 2015 Intel manual version, it says that the only control flag is DF http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-1-manual.pdf

Current page says TF and IF are control as well. Intel manual says they are system flags.

Am I missing something?

Bit width?[edit]

If the register is 16 bits wide, why are there 22 listed (the original table went up to 0x15)? Urhixidur 14:14, 8 May 2006 (UTC)[reply]

That's EFLAGS already. Working on it. Anon2 14:18, 8 May 2006 (UTC)[reply]

FLAGS section table[edit]

The table makes it seem like EFLAGS is only bit 16-31 and RFLAGS is only considered to be bit 32-63. I think the table should be split, saying that with the introduction of EFLAGS, the following bits were added. Same principal should be used for the RFLAGS section of the table. No table headings (FLAGS, EFLAGS, RFLAGS) should be added IMHO.

PUSHF/PUSHFD/PUSHFQ are aliases[edit]

PUSHF/PUSHFD/PUSHFQ are aliases not seperate operations, they all have the same opcode 9Ch and cannot be overruled by prefixes. The symantics depend on processor mode. Thus you cannot push the lower 16 bits of EFLAGS onto the stack in 32- or 64-bit mode. Calling PUSHF will push 32-bit EFLAGS or 64-bit RFLAGS instead. Same yields for POPF/POPFD/POPFQ with opcode 9Dh. — Preceding unsigned comment added by Arnoudmulder (talk • contribs) 23:05, 17 September 2017 (UTC)[reply]

Rename Adjust Flag to Auxiliary Carry Flag[edit]

The Intel documentation uses "Auxiliary Carry" not "Adjust". Any objections to this change? KenShirriff (talk) 17:30, 29 January 2023 (UTC)[reply]