File:4-fach-NAND-C10.JPG
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Summary
| Description |
Deutsch: NAND-Gatter mit 4 Eingängen in Transistor-Transistor-Logik; 7 Transistoren auf dem Chip, kleinste Strukturbreite 20µm (siehe Radio Fernsehen Elektronik 10/1990, S. 649) |
| Date | |
| Source | Own work |
| Author | Dgarte |
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 15:12, 10 April 2012 | | 967 × 1,206 (1.6 MB) | Dgarte | {{Information |Description=4-faches Nand-Gatter der Transistor-Transistor-Logik |Source={{own}} |Date= 1968 |Author= Dgarte |Permission= |other_versions= }} |
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The following pages on the English Wikipedia use this file (pages on other projects are not listed):
- 1.5 μm process
- 10 nm process
- 10 µm process
- 130 nm process
- 14 nm process
- 180 nm process
- 1 μm process
- 22 nm process
- 250 nm process
- 28 nm process
- 2 nm process
- 32 nm process
- 350 nm process
- 3 nm process
- 3 μm process
- 45 nm process
- 5 nm process
- 600 nm process
- 65 nm process
- 6 μm process
- 7 nm process
- 800 nm process
- 90 nm process
- Die shrink
- International Technology Roadmap for Semiconductors
- List of semiconductor scale examples
- Moore's law
- Semiconductor
- Semiconductor device fabrication
- Semiconductor industry
- Transistor count
- ZMDI
- User:Electron9/List of semiconductor scale examples
- User:SarmentFurtif/sandbox
- Template:Semiconductor manufacturing processes
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